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may 2013 docidid024118 rev 1 1/24 AN4230 application note stm32f2xx, stm32f4xx random number generation validation using nist statistical test suite introduction many standards have created requirements and refere nces for the construction, the validation and the use of random number generators (rng), in order to pursue that the output they produce is indeed random. the purpose of this application note is to provid e guidelines to verify the randomness of numbers generated by an stm32f2xx and an stm32f4xx embedded random number generator peripheral. this verification is based on the nationa l institute of standards and technolo gy (nist) statistical test suite (sts) sp 800-22, which was published and updated recently as sp800-22rev1a (april 2010). this application note is structured as follows: ? a general introduction to stm32f2 and stm32f4 random number generator (see section 1 ) ? the nist sp800-22b test suite (see section 2 ) ? the steps to run nist sp800-22b test and analysis (see section 3 ) this application note is provided with a fi rmware package which contains 2 projects: stm32f2xx_rnggenerationviauart and stm32f4 xx_rnggenerationviauart, based on stm32f2 and stm32f4 respectively, in order to generate random number to be tested using the nist statistical test suite. table 1 lists the microcontrollers concerned by this application note. table 1. applicable products type applicable products microcontrollers stm32f2xx stm32f4xx www.st.com
contents AN4230 2/24 docidid024118 rev 1 contents 1 stm32 f2/f4 mcu random number generator . . . . . . . . . . . . . . . . . . . . 4 1.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 stm32 mcus implementation description . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2.1 true random number generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 nist sp800-22b test suite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 nist sp800-22b test suite description . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 nist sp800-22b test suite running and anal yzing . . . . . . . . . . . . . . . . . 8 3.1 firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1.1 on the stm32f2/f4 side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1.2 on the nist sp800-22b test suite side . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 nist sp800-22b test suite steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 first step: random number generator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 second step: nist statistical test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 third step: tests report . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 appendix a additional information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
docidid024118 rev 1 3/24 AN4230 list of figures list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. block diagram of deviation testing of a binary sequence from randomness based on nist test suite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 3. main sts-2.1.1 screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. file input screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. statistical test screen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. parameter adjustment screen. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. bitstreams input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 8. input file format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. statistical testing in progress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. statistical testing complete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
stm32 f2/f4 mcu random number generator AN4230 4/24 docidid024118 rev 1 1 stm32 f2/f4 mcu random number generator 1.1 introduction random number generators (rng) used for cryptographic applications typically produce sequences made of random 0 and 1 bits. there are two basic classes of random number generators: 1. deterministic random number generator or pseudo random number generator (prng): a deterministic rng consisting of an algorithm that produces a sequence of bits from an initial value called a seed. to ensure forw ard unpredictability, care must be taken in obtaining seeds. the values produced by a prng are completely predictable if the seed and generation algorithm are know n. since in many cases the generation algorithm is publicly available, the seed must be kept secret and generated from a trng. 2. non deterministic random number generator or true random number generator (trng): a nondeterministic rng producing randomness which depends on some unpredictable physical source (i.e. the entropy s ource) outside of any human control. the stm32 f2xx and stm32f4xx microcontrollers embed a true random number generator as described in section 1.2.1 . 1.2 stm32 mcus implementation description 1.2.1 true random number generator the true random number generator peripheral implemented on stm32 f2 series is the same as the one implemented on f4 series, and it is based on an analog circuit. this circuit generates a continuous analog noise that feed a linear feedback shift register (lfsr) in order to produce a 32-bit random number. the analog circuit is made of several ring oscillators whos e outputs are xored. the lfsr is clocked by a dedicated clock (pll48clk) at a constant frequency, so that the quality of the random number is independent of the hclk frequency. the contents of lfsr is transferred into th e data register (rng_dr) when a significant number of seeds have been introduced into lfsr.
docidid024118 rev 1 5/24 AN4230 stm32 f2/f4 mcu random number generator figure 1 shows the trng block diagram on stm32f2/f4 series. figure 1. block diagram for more details about the true random number generator embedded in stm32f2/f4 series, refer to stm32f2 reference manual (rm0033) or stm32f4 reference manual (rm00329). 32-bit ahb bus rng_dr rng _cr rng _sr status register control register fault detector lfsr analog seed rng_clk clock checker & data register shift register feed a linear feedback ai16080
nist sp800-22b test suite AN4230 6/24 docidid024118 rev 1 2 nist sp800-22b test suite 2.1 introduction the nist sp800-22b statistical test suite has been carried out using a statistical test suite (sts) developed by the national institute of standards and technology (nist) to probe the quality of random generators for cryptographic applications. a comprehensive description of the suite was presented in the paper entitled: ?a statistical test suit e for the validation of random number generators and pseudo random number generators for cryptographic applications? . 2.2 nist sp800-22b test suite description the nist sp800-22b statistica l test suite ?sts-2.1.1? is a software package which was developed by the national institute of standards and technology ; it can be downloaded from the nist web site at the following address: http://csrc.nist.gov/groups/st/toolki t/rng/documentation_software.html the source code has been written in ansi c. th e nist statistical test suite consists of 15 tests that were developed to test the rand omness of a binary sequence. these tests focus on a variety of types of non-randomness that co uld exist in a sequence. from this point of view, the test suite can be classified as follows: frequency tests ? frequency (monobit) test: to measure the distribution of 0?s and 1?s in a se quence and to check if the result is similar to the one expected for a truly random sequence. ? frequency test within a block: to check whether the frequency of 1?s in an m-bit block is approximately m/2, as would be expected from the theory of randomness. ? run tests: to assess if the expected total number of runs of 1?s and 0?s of various lengths is as expected for a random sequence. ? test of the longest run of 1?s in a block: to examine the long runs of 1?s in a sequence. test of linearity ? binary matrix rank test: to assess the distribution of the rank for 32x32 binary matrices. ? linear complexity test: to determine the linear complexity of a finite sequence. test of correlation (by means of fourier transform) ? discrete fourier transform (spectral) test: to assess the spectral frequency of a bit string via the spectral test based on the discrete fourier transform. it is sensitive to the period icity in the sequence.
docidid024118 rev 1 7/24 AN4230 nist sp800-22b test suite test of finding some special strings ? non-overlapping template matching test: to assess the frequency of m-bit non-periodic patterns. ? overlapping template matching test: to assess the frequency of m-bit periodic templates entropy tests ? maurer?s ?universal statistical? test: to assess the compressibility of a binary sequence of l-bit blocks. ? serial test: to assess the distribution of all 2 m m-bit blocks. note: for m = 1, the seri al test is equivalent to the frequency test of section 2.2 . ? approximate entropy test: to assess the entropy of a bit string, comparing the frequency of all m-bit patterns against all (m+1)-bit patterns. random walk tests ? cumulative sums (cusums) test: to assess that the sum of partial sequences is not too large or too small; it is indicative of too many 0?s or 1?s. ? random excursion test: to assess the distribution of states within a cycle of random walk. ? random excursion variant test: to detect deviations from the expected number of visits to differen t states of the random walk. each of the above tests is based on a calculated test statistic value, wh ich is a function of the testing sequence. the test statistic value is used to calculate a pvalue where: pvalue is the probability that the pe rfect random number generat or would have produced a sequence less random than the sequence that was tested. for more details about the nist statistical test suite, refer to the following nist document available on the nist web site: ?a statistical test suite for random and pseudorandom number generators for cryptographic applications? special publication 800-22 revision 1a.
nist sp800-22b test suite running and analyzing AN4230 8/24 docidid024118 rev 1 3 nist sp800-22b test suite running and analyzing 3.1 firmware description to run the nist statistical test suite as descri bed in the previous section, two firmware are needed, one on the stm32f2/f4 side and one on the nist sp800-22b test suite side. 3.1.1 on the stm32f2/f4 side within this application note, the firmware program is: ? stm32f2xx_rnggenerationviauart for stm32f2 series ? stm32f4xx_rnggenerationviauart for stm32f4 series each of them is provided with five different tool chains to allow the generation of random numbers using the stm32 random number generator (rng) peripheral and to send them to a workstation via the uart in terface with the following settings: ? baud rate = 38400 baud (a) ? word length = 8 bits ? one stop bit ? no parity ? hardware flow control disabled (rts and cts signals) each firmware program is used to generate 10 blocks of 64,000 bytes of random number, so the output file will contain 5,120,000 random bits to be tested with the nist statistical test. as recommended by the nist statistical test suite, the output file format can: 1. be a sequence of ascii 0's and 1's if the file_ascii_format private define is uncommented in the main.c file 2. have each byte in the data file containing 8 bits of data if the file_binary_format private define is uncommented in the main.c file. after startup, the program is waiting for the user to press a key button in order to start generating a random number and sending it to the usart. two status leds, led 1 and led 2, are used in this program as follows: ? after startup, led 1 and led 2 turn off. ? led 2 turns on and led 1 turns off when a key button is pressed to indicate that rng is on-going. ? led 2 turns off and led 1 turns on when rng generation is complete. form more details about the program description and settings, refer to the readme file inside the firmware package provided with this application note. a. it is recommended to use 34800 baud in order to generate a baudrate with a high precision (the error calculation for programmed baud rates is equal to 0% erro r). for more details about the error calculation for programmed baud rates, refer to the universal sy nchronous asynchronous receiver transmitter (usart) section in the stm32f2 reference manual (rm0033) or the stm32f4 reference manual (rm00329)."
docidid024118 rev 1 9/24 AN4230 nist sp800-22b test suite running and analyzing note: the usart configuration can be changed by the user via the sendtoworkstation() function in the main.c file. the output values can be changed by the user by modifying the private define in the main.c file: #define number_of_random_bits_to_generate 512000 #define block_number 10 3.1.2 on the nist sp 800-22b test suite side downloaded on a workstation, the nist statisti cal test suite package sts-2.1.1 verifies the randomness of the output file of the random number generator from stm32 f2/f4 products. the generator file to be analyzed should be stored under the data folder (sts-2.1.1\data). for more details about how the nist statisti cal tests work, refer to section how to get started in ?a statistical test suite for random and pseudorandom number generators for cryptographic applications? special publication 800-22 revision 1a. 3.2 nist sp800-22b test suite steps figure 2 describes the different steps needed to verify the randomness of an output number generated by stm32 f2/f4 using the nist statistical test suite package sts-2.1.1. figure 2. block diagram of deviation test ing of a binary sequence from randomness based on nist test suite 3.2.1 first step: random number generator connect stmicroelectronics evaluation board (stm322xg-eval? for stm32f2 series or stm324xg-eval? for stm32f4 series) with db9 connector cn16 (usart3) to the workstation serial port via a null-modem female/female rs232 cable. then, run stm32 rng generation via the uart firmware using yo ur preferred toolchain in order to generate a random number as described in the previous section. you can store data on the
nist sp800-22b test suite running and analyzing AN4230 10/24 docidid024118 rev 1 workstation using a terminal emulation application such as hyperterminal (a program that comes with windows operating system, from windows 98). note: this example has been developed and tested with stm322xg-eval revb for stm32 f2 series and stm324xg-eval revc for stm32f4 series. it can be easily tailored for any other development board. 3.2.2 second step: ni st statistical test compile sts-2.1.1 package as de scribed in the nist statistica l test suite documentation in order to create an executable program using visual c++ compiler. after running the nist statisti cal test suite program, a se ries of menu prompts will be displayed in order to select the data to be analyzed and the statistical tests to be applied. in this application note, th e nist statistical test suit e is compiled under the name assess.exe and saved under nist_test_suite_outputexample folder . as described in the previous section, the random number is defined as 512,000 bits per block . the first screen appears as in figure 3 . figure 3. main sts-2.1.1 screen when value 0 is entered, the program requires to enter the file name and path of the random number to be tested. the second screen appears as in figure 4 .
docidid024118 rev 1 11/24 AN4230 nist sp800-22b test suite running and analyzing figure 4. file input screen this application note provides you with an example of two files per series, generated with stm32f2 and stm32f4 random number generator with different file formats as recommended by nist: 1. ascii.bin: sequence of ascii 0's and 1's. 2. binary.bin : each byte in the data file contains 8 bits of data. then, the nist statistical test suite displays 15 tests that can be run via the screen in figure 5 . figure 5. statistical test screen in this case, ?1? has been selected to apply all of the statistical tests. figure 6 is displayed to change the parameter adjustments.
nist sp800-22b test suite running and analyzing AN4230 12/24 docidid024118 rev 1 figure 6. parameter adjustment screen in this example, the default settings are kept and value ?0? is selected to go to the next step. figure 7. bitstreams input the nist statistical test suite re quires to put the number of bi tstreams; here, ?10? is entered. you have selected 10 blocks of 512,000 bits which equal to 5,120,000 bits. you must then specify whether the file consists of bits stored in ascii format or hexadecimal strings stored in a binary format using the following screen.
docidid024118 rev 1 13/24 AN4230 nist sp800-22b test suite running and analyzing figure 8. input file format value ?0? is selected because th e file is in ascii format. after entering all necessary inpu ts, the nist statistical test su ite starts analyzing the input file. figure 9. statistical testing in progress when the testing process is complete, as shown in figure 10 , the statistical test results can be found in sts-2.1.1\ex periments\algorithmtesting.
nist sp800-22b test suite running and analyzing AN4230 14/24 docidid024118 rev 1 figure 10. statistical testing complete 3.2.3 third step: tests report the nist statistical tests provid e an analytical routi ne to facilitate the interpretation of the results. a file named finalanalysisreport is generated when the statistical testing is complete and saved under sts2.1.1\experiments\algorithmtesting. the report contains a summary of experimental results of 15 tests, as described in appendix a . the nst statistical tests also provide a detail ed report for each test, which is saved under sts-2.1.1\experiments\algorithmtesting\. note: you can find two examples per series of comp lete nist statistical te st suite output repor ts under ?nist_test_suite_outputexample? . 1. example of an ascii_file_format . this example has 2 folders: ? input_file which contains the random number generator saved with the ascii format. ? final_analysis_report which contains the complete nist statistical test suite output report based on this input file, th e summary of experimental results and the report of each test. 2. example of a binary_file_format. this example has 2 folders: ? input_file which contains the random number generator saved with the binary format. ? final_analysis_report which contains the complete nist statistical test suite output report based on this input file, th e summary of experimental results and the report of each test.
docidid024118 rev 1 15/24 AN4230 conclusion 4 conclusion this application note describes the main guidel ines and steps to verify the randomness of numbers generated by the stm32f2/f4 random number generator peripheral using nist statistical test suite sp800-22rev1a, april 2010. 15 tests of nist statistical test suite are pass ed in accordance with the minimum pass rate for each statistical test unde r the following conditions: ? environment stm32f2 series: ? stmicroelectronics evaluation board stm322xg-eval revb ? stm32f207ig device stm32f4 series: ? stmicroelectronics evaluation board stm324xg-eval revb ? stm32f407ig device ambient temperature ? firmware nist statistical test suite st s-2.1.1 with default parameter stm32f2 series: ? stm32f2xx standard peripherals library version v1.1.0/13-april-2012 stm32f4 series: ? stm32f4xx standard peripherals library version v1.0.2/05-march-2012 ? input file for each series ? binary format ? ascii format ? size: 5,120,000 bits
additional information AN4230 16/24 docidid024118 rev 1 appendix a additional information the results are represented as a table with p rows and q columns. ? the number of rows, p, corresponds to th e number of statistical tests applied. ? the number of columns, q = 13, is distributed as follows: ? columns 1-10 correspond to the frequency of p-values10, ? column 11 is the p-value that arises vi a the application of a chi-square test11, ? column 12 is the proportion of binary sequences that passed, ? column 13 is the corresponding statistical test. an example is shown in table 2 . for more details, refer to finalanalysisreport file under sts- 2.1.1\experiments\algorithmtesting). table 2. example ------------------------------------------------------------------------------ results for the uniformity of p-valu es and the proportion of passing sequences ------------------------------------------------------------------------------ generator is ------------------------------------------------------------------------------ c1 c2 c3 c4 c5 c6 c7 c8 c9 c10 p-value proportion statistical test ------------------------------------------------------------------------------ 0 1 2 1 2 1 1 1 0 1 0.911413 10/10 frequency 1 1 0 1 3 0 2 1 1 0 0.534146 10/10 blockfrequency 0 1 3 3 0 1 0 2 0 0 0.122325 10/10 cumulativesums 1 1 3 1 0 1 1 1 0 1 0.739918 10/10 cumulativesums 2 0 2 2 1 1 0 1 0 1 0.739918 10/10 runs 1 0 1 1 0 3 1 1 0 2 0.534146 9/10 longestrun 1 2 1 0 2 1 1 0 0 2 0.739918 10/10 rank 3 0 1 2 1 1 0 1 0 1 0.534146 9/10 fft 1 1 1 0 0 2 1 2 0 2 0.739918 10/10 nonoverlappingtemplate 1 1 0 0 1 1 1 3 0 2 0.534146 10/10 nonoverlappingtemplate 0 2 1 0 4 0 2 0 0 1 0.066882 10/10 nonoverlappingtemplate 0 0 0 1 1 3 0 2 1 2 0.350485 10/10 nonoverlappingtemplate 0 1 2 2 1 1 1 2 0 0 0.739918 10/10 nonoverlappingtemplate 2 2 1 0 2 0 1 1 1 0 0.739918 10/10 nonoverlappingtemplate 1 0 2 2 1 1 1 0 1 1 0.911413 10/10 nonoverlappingtemplate 0 0 1 1 0 0 2 3 1 2 0.350485 10/10 nonoverlappingtemplate
docidid024118 rev 1 17/24 AN4230 additional information 1 1 1 0 4 0 0 0 2 1 0.122325 10/10 nonoverlappingtemplate 1 0 1 0 2 3 0 0 2 1 0.350485 10/10 nonoverlappingtemplate 0 1 0 2 2 2 2 0 1 0 0.534146 10/10 nonoverlappingtemplate 1 0 1 1 2 0 2 1 0 2 0.739918 10/10 nonoverlappingtemplate 0 1 2 0 0 0 3 2 1 1 0.350485 10/10 nonoverlappingtemplate 2 1 1 1 2 2 0 0 1 0 0.739918 10/10 nonoverlappingtemplate 1 1 2 3 1 0 1 0 1 0 0.534146 10/10 nonoverlappingtemplate 1 3 1 3 1 1 0 0 0 0 0.213309 10/10 nonoverlappingtemplate 1 1 2 0 2 2 0 0 1 1 0.739918 10/10 nonoverlappingtemplate 2 1 1 1 1 0 1 1 1 1 0.991468 10/10 nonoverlappingtemplate 2 0 0 0 1 4 0 1 0 2 0.066882 10/10 nonoverlappingtemplate 2 0 0 1 2 2 1 0 0 2 0.534146 10/10 nonoverlappingtemplate 0 2 1 1 0 3 1 1 0 1 0.534146 10/10 nonoverlappingtemplate 0 2 1 1 2 1 1 0 1 1 0.911413 10/10 nonoverlappingtemplate 0 0 1 0 4 0 2 1 0 2 0.066882 10/10 nonoverlappingtemplate 1 2 1 2 0 2 2 0 0 0 0.534146 10/10 nonoverlappingtemplate 3 0 1 1 0 1 3 1 0 0 0.213309 10/10 nonoverlappingtemplate 2 0 1 0 1 0 1 4 0 1 0.122325 10/10 nonoverlappingtemplate 0 1 1 0 1 1 0 1 4 1 0.213309 10/10 nonoverlappingtemplate 3 2 0 0 1 0 3 1 0 0 0.122325 10/10 nonoverlappingtemplate 0 3 0 2 1 1 1 1 0 1 0.534146 10/10 nonoverlappingtemplate 0 1 1 4 0 0 1 0 1 2 0.122325 10/10 nonoverlappingtemplate 0 0 2 0 1 2 1 4 0 0 0.066882 10/10 nonoverlappingtemplate 2 1 2 0 0 1 2 1 1 0 0.739918 10/10 nonoverlappingtemplate 1 1 2 2 0 0 0 1 2 1 0.739918 10/10 nonoverlappingtemplate 1 0 1 3 1 0 1 2 1 0 0.534146 10/10 nonoverlappingtemplate 1 3 2 1 1 0 0 1 0 1 0.534146 10/10 nonoverlappingtemplate 2 0 0 0 0 0 2 1 1 4 0.066882 10/10 nonoverlappingtemplate 0 1 1 0 1 0 1 2 1 3 0.534146 10/10 nonoverlappingtemplate 1 2 0 0 2 2 0 1 1 1 0.739918 10/10 nonoverlappingtemplate 1 3 0 2 0 0 0 2 2 0 0.213309 9/10 nonoverlappingtemplate 3 1 0 0 0 2 1 0 3 0 0.122325 10/10 nonoverlappingtemplate 1 0 2 0 3 0 1 1 1 1 0.534146 10/10 nonoverlappingtemplate 0 1 1 1 0 2 2 2 0 1 0.739918 10/10 nonoverlappingtemplate 2 1 0 0 3 1 1 0 2 0 0.350485 10/10 nonoverlappingtemplate
additional information AN4230 18/24 docidid024118 rev 1 0 0 1 2 1 4 1 1 0 0 0.122325 10/10 nonoverlappingtemplate 1 1 0 1 1 3 2 0 1 0 0.534146 10/10 nonoverlappingtemplate 2 1 0 2 1 0 1 0 1 2 0.739918 10/10 nonoverlappingtemplate 0 0 2 3 1 1 0 1 1 1 0.534146 10/10 nonoverlappingtemplate 1 1 1 0 1 3 1 0 1 1 0.739918 9/10 nonoverlappingtemplate 0 1 4 0 0 1 2 1 1 0 0.122325 10/10 nonoverlappingtemplate 1 3 0 0 0 0 1 1 2 2 0.350485 10/10 nonoverlappingtemplate 2 1 1 1 1 0 1 0 2 1 0.911413 10/10 nonoverlappingtemplate 2 1 2 0 1 1 0 1 1 1 0.911413 9/10 nonoverlappingtemplate 1 0 1 0 2 2 1 2 0 1 0.739918 10/10 nonoverlappingtemplate 0 1 3 1 1 1 1 2 0 0 0.534146 10/10 nonoverlappingtemplate 4 0 0 0 2 1 2 0 0 1 0.066882 10/10 nonoverlappingtemplate 0 0 0 0 2 0 1 2 2 3 0.213309 10/10 nonoverlappingtemplate 2 2 0 0 3 1 0 1 0 1 0.350485 10/10 nonoverlappingtemplate 2 0 2 0 1 0 2 2 0 1 0.534146 9/10 nonoverlappingtemplate 1 0 1 0 0 1 3 0 3 1 0.213309 9/10 nonoverlappingtemplate 1 2 1 1 0 1 3 0 0 1 0.534146 10/10 nonoverlappingtemplate 0 1 2 0 1 0 1 2 0 3 0.350485 10/10 nonoverlappingtemplate 2 0 2 0 0 0 2 0 3 1 0.213309 10/10 nonoverlappingtemplate 2 1 2 1 0 1 0 2 0 1 0.739918 10/10 nonoverlappingtemplate 1 0 1 0 4 0 0 1 2 1 0.122325 10/10 nonoverlappingtemplate 0 0 0 2 1 1 3 2 1 0 0.350485 10/10 nonoverlappingtemplate 1 3 1 0 2 0 1 0 0 2 0.350485 9/10 nonoverlappingtemplate 0 0 1 0 0 3 1 2 3 0 0.122325 10/10 nonoverlappingtemplate 0 1 0 2 1 0 1 2 3 0 0.350485 10/10 nonoverlappingtemplate 0 0 0 2 4 2 1 1 0 0 0.066882 10/10 nonoverlappingtemplate 1 0 0 2 0 1 2 1 2 1 0.739918 9/10 nonoverlappingtemplate 0 0 2 0 1 2 0 0 1 4 0.066882 10/10 nonoverlappingtemplate 1 1 0 1 1 1 2 0 2 1 0.911413 10/10 nonoverlappingtemplate 0 0 0 5 2 0 1 2 0 0 0.004301 10/10 nonoverlappingtemplate 2 1 0 0 1 1 0 1 3 1 0.534146 10/10 nonoverlappingtemplate 1 1 1 0 0 2 1 2 0 2 0.739918 10/10 nonoverlappingtemplate 2 0 2 1 0 1 2 0 1 1 0.739918 10/10 nonoverlappingtemplate 0 1 3 0 1 0 1 2 1 1 0.534146 10/10 nonoverlappingtemplate 1 1 1 1 1 1 1 2 1 0 0.991468 10/10 nonoverlappingtemplate
docidid024118 rev 1 19/24 AN4230 additional information 0 0 3 2 2 2 0 1 0 0 0.213309 10/10 nonoverlappingtemplate 2 1 2 1 1 1 0 0 1 1 0.911413 10/10 nonoverlappingtemplate 0 1 1 1 0 1 2 1 2 1 0.911413 10/10 nonoverlappingtemplate 1 0 0 2 3 2 0 0 1 1 0.350485 10/10 nonoverlappingtemplate 2 2 1 0 0 1 1 3 0 0 0.350485 10/10 nonoverlappingtemplate 2 0 2 2 0 0 0 1 0 3 0.213309 10/10 nonoverlappingtemplate 1 1 1 2 0 0 2 2 0 1 0.739918 10/10 nonoverlappingtemplate 3 2 1 0 1 0 0 0 1 2 0.350485 9/10 nonoverlappingtemplate 2 0 1 1 2 1 1 0 1 1 0.911413 10/10 nonoverlappingtemplate 0 2 0 0 1 0 1 3 2 1 0.350485 10/10 nonoverlappingtemplate 1 0 3 1 0 0 1 2 1 1 0.534146 9/10 nonoverlappingtemplate 1 2 0 2 0 4 0 0 0 1 0.066882 10/10 nonoverlappingtemplate 1 0 1 0 2 0 1 1 4 0 0.122325 9/10 nonoverlappingtemplate 1 1 1 1 0 0 3 2 1 0 0.534146 10/10 nonoverlappingtemplate 2 0 1 0 0 1 1 1 1 3 0.534146 9/10 nonoverlappingtemplate 3 0 1 1 1 1 1 1 1 0 0.739918 10/10 nonoverlappingtemplate 1 0 0 1 1 1 1 3 0 2 0.534146 10/10 nonoverlappingtemplate 3 3 1 1 0 0 0 1 1 0 0.213309 10/10 nonoverlappingtemplate 1 0 0 1 1 0 1 1 4 1 0.213309 10/10 nonoverlappingtemplate 0 2 2 3 1 1 0 1 0 0 0.350485 10/10 nonoverlappingtemplate 2 1 0 3 0 0 2 0 1 1 0.350485 10/10 nonoverlappingtemplate 1 0 0 3 0 1 1 2 0 2 0.350485 9/10 nonoverlappingtemplate 1 2 0 1 0 0 3 2 0 1 0.350485 10/10 nonoverlappingtemplate 2 1 1 1 2 0 1 1 1 0 0.911413 10/10 nonoverlappingtemplate 0 0 1 2 1 1 1 3 0 1 0.534146 10/10 nonoverlappingtemplate 0 0 2 1 3 0 3 0 0 1 0.122325 10/10 nonoverlappingtemplate 0 2 2 1 0 0 2 1 1 1 0.739918 10/10 nonoverlappingtemplate 1 2 0 2 2 1 0 0 1 1 0.739918 10/10 nonoverlappingtemplate 1 1 2 0 2 1 3 0 0 0 0.350485 10/10 nonoverlappingtemplate 2 1 0 1 1 1 3 1 0 0 0.534146 9/10 nonoverlappingtemplate 2 4 0 1 1 1 0 0 0 1 0.122325 10/10 nonoverlappingtemplate 0 0 1 0 2 2 2 2 0 1 0.534146 10/10 nonoverlappingtemplate 2 1 2 0 1 1 1 1 0 1 0.911413 10/10 nonoverlappingtemplate 1 1 1 4 1 1 1 0 0 0 0.213309 10/10 nonoverlappingtemplate 1 0 0 2 0 1 2 1 3 0 0.350485 10/10 nonoverlappingtemplate
additional information AN4230 20/24 docidid024118 rev 1 4 0 2 0 2 0 1 0 0 1 0.066882 10/10 nonoverlappingtemplate 0 1 2 2 0 0 0 2 2 1 0.534146 10/10 nonoverlappingtemplate 1 0 2 0 1 1 0 3 1 1 0.534146 10/10 nonoverlappingtemplate 4 1 1 0 0 0 0 1 1 2 0.122325 10/10 nonoverlappingtemplate 2 1 0 0 1 1 2 1 1 1 0.911413 10/10 nonoverlappingtemplate 0 1 1 1 0 0 1 4 1 1 0.213309 10/10 nonoverlappingtemplate 1 2 2 0 0 5 0 0 0 0 0.004301 10/10 nonoverlappingtemplate 0 2 2 2 0 2 0 1 1 0 0.534146 10/10 nonoverlappingtemplate 3 1 1 0 0 2 0 1 1 1 0.534146 10/10 nonoverlappingtemplate 2 1 0 1 1 1 0 2 1 1 0.911413 10/10 nonoverlappingtemplate 1 1 2 1 0 1 1 0 1 2 0.911413 10/10 nonoverlappingtemplate 0 1 2 3 0 2 0 2 0 0 0.213309 10/10 nonoverlappingtemplate 0 1 0 1 3 1 2 0 0 2 0.350485 10/10 nonoverlappingtemplate 3 0 0 3 1 0 1 0 1 1 0.213309 9/10 nonoverlappingtemplate 0 1 0 2 0 2 1 0 3 1 0.350485 10/10 nonoverlappingtemplate 1 1 3 2 0 1 0 1 0 1 0.534146 10/10 nonoverlappingtemplate 0 1 0 3 0 0 0 1 0 5 0.002043 10/10 nonoverlappingtemplate 2 1 0 1 0 0 3 1 1 1 0.534146 10/10 nonoverlappingtemplate 2 0 0 0 2 1 1 0 3 1 0.350485 10/10 nonoverlappingtemplate 0 2 1 1 2 2 0 0 0 2 0.534146 10/10 nonoverlappingtemplate 0 0 1 0 3 0 1 1 1 3 0.213309 10/10 nonoverlappingtemplate 1 0 2 2 0 0 0 2 3 0 0.213309 10/10 nonoverlappingtemplate 1 2 2 1 1 1 0 1 0 1 0.911413 10/10 nonoverlappingtemplate 1 1 1 1 4 0 0 1 0 1 0.213309 9/10 nonoverlappingtemplate 0 1 1 2 2 1 0 0 2 1 0.739918 10/10 nonoverlappingtemplate 2 1 0 0 2 0 1 2 1 1 0.739918 10/10 nonoverlappingtemplate 1 0 1 1 0 0 2 3 1 1 0.534146 10/10 nonoverlappingtemplate 2 1 0 0 1 2 2 0 0 2 0.534146 10/10 nonoverlappingtemplate 0 0 2 0 1 0 3 3 0 1 0.122325 10/10 nonoverlappingtemplate 1 1 1 2 0 3 1 0 0 1 0.534146 10/10 nonoverlappingtemplate 1 0 1 1 1 2 2 1 0 1 0.911413 10/10 nonoverlappingtemplate 0 1 2 0 1 1 2 0 1 2 0.739918 10/10 nonoverlappingtemplate 1 2 0 0 1 3 1 1 0 1 0.534146 10/10 nonoverlappingtemplate 2 1 1 0 1 0 0 2 0 3 0.350485 10/10 nonoverlappingtemplate 2 1 0 0 1 1 0 1 3 1 0.534146 10/10 nonoverlappingtemplate
docidid024118 rev 1 21/24 AN4230 additional information 2 0 1 0 1 2 1 0 2 1 0.739918 10/10 overlappingtemplate 1 0 2 1 0 2 2 1 1 0 0.739918 10/10 universal 1 1 0 0 2 0 2 3 1 0 0.350485 10/10 approximateentropy 0 1 1 1 1 0 0 0 1 0 ---- 5/5 randomexcursions 1 1 0 0 2 0 0 0 0 1 ---- 5/5 randomexcursions 0 1 1 1 0 0 0 0 1 1 ---- 5/5 randomexcursions 0 0 0 0 0 1 1 0 2 1 ---- 5/5 randomexcursions 1 0 0 0 3 0 0 0 1 0 ---- 5/5 randomexcursions 0 0 0 1 1 0 0 1 1 1 ---- 5/5 randomexcursions 1 0 1 1 0 2 0 0 0 0 ---- 5/5 randomexcursions 1 0 0 0 1 1 1 0 1 0 ---- 5/5 randomexcursions 2 1 0 1 1 0 0 0 0 0 ---- 5/5 randomexcursionsvariant 2 1 0 0 1 1 0 0 0 0 ---- 5/5 randomexcursionsvariant 1 1 0 2 1 0 0 0 0 0 ---- 5/5 randomexcursionsvariant 1 2 0 1 1 0 0 0 0 0 ---- 5/5 randomexcursionsvariant 1 1 1 1 0 0 0 1 0 0 ---- 5/5 randomexcursionsvariant 1 1 0 1 1 0 0 0 0 1 ---- 5/5 randomexcursionsvariant 0 1 0 2 1 0 0 0 0 1 ---- 5/5 randomexcursionsvariant 0 0 0 1 0 1 0 3 0 0 ---- 5/5 randomexcursionsvariant 0 0 0 0 0 0 2 1 1 1 ---- 5/5 randomexcursionsvariant 0 0 1 0 0 0 1 1 1 1 ---- 5/5 randomexcursionsvariant 0 0 0 1 0 0 2 0 2 0 ---- 5/5 randomexcursionsvariant 0 1 0 0 1 1 1 1 0 0 ---- 5/5 randomexcursionsvariant 1 0 0 2 0 1 1 0 0 0 ---- 5/5 randomexcursionsvariant 1 0 0 0 2 1 0 0 0 1 ---- 5/5 randomexcursionsvariant 0 0 0 1 1 0 1 1 1 0 ---- 5/5 randomexcursionsvariant 0 0 0 0 2 0 2 0 0 1 ---- 5/5 randomexcursionsvariant 0 0 1 0 1 2 1 0 0 0 ---- 5/5 randomexcursionsvariant 0 0 1 0 0 2 2 0 0 0 ---- 5/5 randomexcursionsvariant 1 1 0 0 0 2 3 0 2 1 0.350485 10/10 serial 0 2 1 0 3 1 0 1 1 1 0.534146 10/10 serial 2 1 1 1 0 1 1 3 0 0 0.534146 10/10 linearcomplexity - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - the minimum pass rate for each statistical te st, with the exception of the random excursion (variant) test, is approximately 8 for a sample size of 10 binary sequences.
additional information AN4230 22/24 docidid024118 rev 1 the minimum pass rate for the random excursion (variant) test is approximately 4 for a sample size of 5 binary sequences. for further guidelines , construct a probability table usin g the maple progr am provided in the addendum section of the documentation.
docidid024118 rev 1 23/24 AN4230 revision history revision history table 3. document revision history date revision changes 13-may-2013 1 initial release.
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